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MX27L256
FEATURES
256K-BIT [32Kx8] LOW VOLTAGE OPERATION CMOS EPROM * * * *
Completely TTL compatible Operating current: 10mA @ 3.6V, 5MHz Standby current: 10uA Package type: - 28 pin plastic DIP - 32 pin PLCC - 28 pin 8 x 13.4mm TSOP(I)
* * * * *
32K x 8 organization Wide Voltage range, 2.7V to 3.6V DC +12.5V programming voltage Fast access time: 120/150/200/250 ns Totally static operation
GENERAL DESCRIPTION
The MX27L256 is a 256K-bit, One-Time Programmable Read Only Memory. It is organized as 32K by 8 bits, operates from a single + 3volt supply, has a static standby mode, and features fast single address location programming. All programming signals are TTL levels, requiring a single pulse. For programming from outside the system, existing EPROM programmers may be
used. The MX27L256 supports intelligent fast programming algorithm which can result in programming time of less than ten seconds. This EPROM is packaged in industry standard 28 pin dual-in-line packages, 32 lead PLCC, and 28 lead TSOP(I) packages.
PIN CONFIGURATIONS
PDIP
VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A14 A13 A8 A9 A11 OE A10 CE Q7 Q6 Q5 Q4 Q3
BLOCK DIAGRAM
VCC
CE OE CONTROL LOGIC OUTPUT BUFFERS
PLCC
VPP A12 A14 A13 4 NC A7
Q0~Q7
1
A6 A5 A4 A3 A2 A1 A0 NC Q0
5
32
30 29
A8 A9 A11 NC
A0~A14 ADDRESS INPUTS . . . . . . . . Y-DECODER . . . . . . . . VPP Y-SELECT
MX27L256
9
MX27L256
25
OE A10 CE Q7
256K BIT CELL MAXTRIX
X-DECODER
13 14 Q1 Q2 GND
17 NC Q3 Q4
21 20 Q5
Q6
VCC GND
8 x 13.4mm 28 -TSOP(I)
OE A11 A9 A8 A13 A14 VCC VPP A12 A7 A6 A5 A4 A3 22 23 24 25 26 27 28 1 2 3 4 5 6 7 21 20 19 18 17 16 15 14 13 12 11 10 9 8 A10 CE Q7 Q6 Q5 Q4 Q3 GND Q2 Q1 Q0 A0 A1 A2
PIN DESCRIPTION
SYMBOL A0~A14 Q0~Q7 CE OE VPP NC VCC GND PIN NAME Address Input Data Input/Output Chip Enable Input Output Enable Input Program Supply Voltage No Internal Connection Power Supply Pin Ground Pin
MX27L256
P/N: PM0248
REV. 3.6, AUG. 26, 2003
1
MX27L256
FUNCTIONAL DESCRIPTION
THE PROGRAMMING OF THE MX27L256 When the MX27L256 is delivered, or it is erased, the chip has all 256K bits in the "ONE" or HIGH state. "ZEROs" are loaded into the MX27L256 through the procedure of programming. For programming, the data to be programmed is applied with 8 bits in parallel to the data pins. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. When programming an MXIC EPROM, a 0.1uF capacitor is required across VPP and ground to suppress spurious voltage transients which may damage the device. AUTO IDENTIFY MODE The auto identify mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and device type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25C 5C ambient temperature range that is required when programming the MX27L256. To activate this mode, the programming equipment must force 12.0 0.5 (VH) on address line A9 of the device. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during auto identify mode. Byte 0 ( A0 = VIL) represents the manufacturer code, and byte 1 (A0 = VIH), the device identifier code. For the MX27L256, these two identifier bytes are given in the Mode Select Table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (Q7) defined as the parity bit.
FAST PROGRAMMING The device is set up in the fast programming mode when the programming voltage VPP = 12.75V is applied, with VCC = 6.25 V and OE = VIH (Algorithm is shown in Figure 1). The programming is achieved by applying a single TTL low level 100us pulse to the CE input after addresses and data line are stable. If the data is not verified, an additional pulse is applied for a maximum of 25 pulses. This process is repeated while sequencing through each address of the device. When the programming mode is completed, the data in all address is verified at VCC = VPP = 5V 10%.
READ MODE The MX27L256 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs tOE after the falling edge of OE, assuming that CE has been LOW and addresses have been stable for at least tACC - tOE.
PROGRAM INHIBIT MODE Programming of multiple MX27L256s in parallel with different data is also easily accomplished by using the Program Inhibit Mode. Except for CE and OE, all like inputs of the parallel MX27L256 may be common. A TTL low-level program pulse applied to an MX27L256 CE input with VPP = 12.5 0.5 V and OE HIGH will program that MX27L256. A high-level CE input inhibits the other MX27L256s from being programmed.
STANDBY MODE The MX27L256 has a CMOS standby mode which reduces the maximum Vcc current to 10 uA. It is placed in CMOS standby when CE is at VCC 0.3 V. The MX27L 256 also has a TTL-standby mode which reduces the maximum VCC current to 0.25 mA. It is placed in TTL-standby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input.
PROGRAM VERIFY MODE Verification should be performed on the programmed bits to determine that they were correctly programmed. The verification should be performed with CE and OE at VIL, and VPP at its programming voltage.
P/N:PM0248
2
REV.3.6, AUG. 26, 2003
MX27L256
TWO-LINE OUTPUT CONTROL FUNCTION To accommodate multiple memory connections, a twoline control function is provided to allow for: 1. Low memory power dissipation, 2. Assurance that output bus contention will not occur. It is recommended that CE be decoded and used as the primary device-selecting function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device. SYSTEM CONSIDERATIONS During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1 uF ceramic capacitor (high frequency, low inherent inductance) should be used on each device between VCC and GND to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7 uF bulk electrolytic capacitor should be used between Vcc and GND for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array.
MODE SELECT TABLE
PINS MODE Read Output Disable Standby (TTL) Standby (CMOS) Program Program Verify Program Inhibit Manufacturer Code(3) Device Code(3) CE VIL VIL VIH VCC0.3V VIL VIH VIH VIL VIL OE VIL VIH X X VIH VIL VIH VIL VIL A0 X X X X X X X VIL VIH A9 X X X X X X X VH VH VPP VCC VCC VCC VCC VPP VPP VPP VCC VCC OUTPUTS DOUT High Z High Z High Z DIN DOUT High Z C2H 10H
NOTES: 1. VH = 12.0 V 0.5 V 2. X = Either VIH or VIL 3. A1 - A8 = A10 - A14 = VIL(For auto select)
4. See DC Programming characteristics for VPP voltage during programming.
P/N:PM0248
3
REV.3.6, AUG. 26, 2003
MX27L256
FIGURE 1. FAST PROGRAMMING FLOW CHART
START
ADDRESS = FIRST LOCATION
VCC = 6.25V VPP = 12.75V X=0
PROGRAM ONE 100us PULSE
INTERACTIVE SECTION
INCREMENT X
YES X = 25?
NO FAIL VERIFY BYTE ? PASS NO INCREMENT ADDRESS LAST ADDRESS FAIL YES
VCC = VPP = 5.25V
VERIFY SECTION
VERIFY ALL BYTES ?
FAIL
DEVICE FAILED
PASS DEVICE PASSED
P/N:PM0248
4
REV.3.6, AUG. 26, 2003
MX27L256
SWITCHING TEST CIRCUITS
DEVICE UNDER TEST
1.8K ohm +5V
CL 6.2K ohm
DIODES = IN3064 OR EQUIVALENT
CL = 100 pF including jig capacitance
SWITCHING TEST WAVEFORMS
2.0V
AC driving levels
2.0V TEST POINTS 0.8V OUTPUT
0.8V INPUT
AC TESTING: AC driving levels are 2.4V/0.4V for both commercial grade and industrial grade. Input pulse rise and fall times are < 20ns.
P/N:PM0248
5
REV.3.6, AUG. 26, 2003
MX27L256
ABSOLUTE MAXIMUM RATINGS
RATING Ambient Operating Temperature Storage Temperature Applied Input Voltage Applied Output Voltage VCC to Ground Potential A9 & Vpp VALUE -40oC to 85oC -65oC to 125oC -0.5V to 7.0V -0.5V to VCC + 0.5V -0.5V to 7.0V -0.5V to 13.5V
NOTICE: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability. NOTICE: Specifications contained within the following tables are subject to change.
DC/AC Operating Conditions for Read Operation
MX27L256 -12 Operating Temperature Commercial Industrial Vcc Power Supply 0C to 70C -40C to 85 C 2.7V to 3.6V -15 0 to 70C C -40C to 85C 2.7V to 3.6V -20 0 to 70C C -40C to 85C 2.7V to 3.6V -25 0C to 70C -40 to 85 C C 2.7V to 3.6V
DC CHARACTERISTICS
SYMBOL VOH VOL VIH VIL ILI ILO ICC3 ICC2 ICC1 IPP PARAMETER Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current VCC Power-Down Current VCC Standby Current VCC Active Current VPP Supply Current Read 2.0 -0.3 -10 -10 MIN. VCC -0.3 0.3 VCC + 0.5 0.6 10 10 10 0.25 10 10 MAX. UNIT V V V V uA uA uA mA mA uA VIN = 0 to 3.6V VOUT = 0 to 3.6V CE = VCC 0.3V CE = VIH CE = VIL, f=5MHz, Iout = 0mA, VCC = 3.6V CE = OE = VIL, VPP = VCC CONDITIONS IOH = -100uA, VCC =3.0V IOL = 2.1mA, VCC =3.0V
CAPACITANCE TA = 25oC, f = 1.0 MHz (Sampled only)
SYMBOL CIN COUT VPP PARAMETER Input Capacitance Output Capacitance VPP Capacitance MIN. 8 8 18 MAX. 12 12 25 UNIT pF pF pF CONDITIONS VIN = 0V VOUT = 0V VPP = 0V
P/N:PM0248
6
REV.3.6, AUG. 26, 2003
MX27L256
AC CHARACTERISTICS
27L256-12 SYMBOL tACC tCE tOE tDF PARAMETER Address to Output Delay Chip Enable to Output Delay Output Enable to Output Delay OE High to Output Float, or CE High to Output Float tOH Output Hold from Address, CE or OE which ever occurred first 0 0 0 0 ns 0 MIN. MAX. 120 120 60 40 0 27L256-15 MIN. MAX. 150 150 70 50 0 27L256-20 MIN. MAX. 200 200 100 60 0 27L256-25 MIN. MAX. UNIT CONDITIONS 250 250 120 70 ns ns ns ns CE = OE = VIL OE = VIL CE = VIL
DC PROGRAMMING CHARACTERISTICS TA = 25oC 5C
SYMBOL VOH VOL VIH VIL ILI VH ICC3 IPP2 VCC1 VPP1 PARAMETER Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current A9 Auto Select Voltage VCC Supply Current(Program & Verify) VPP Supply Current(Program) Fast Programming Supply Voltage Fast Programming Voltage 6.00 12.5 2.0 -0.3 -10 11.5 MIN. 2.4 0.4 VCC + 0.5 0.8 10 12.5 40 30 6.50 13.0 MAX. UNIT V V V V uA V mA mA V V CE = VIL, OE = VIH VIN = 0 to 3.6V CONDITIONS IOH = -0.40mA IOL = 2.1mA
AC PROGRAMMING CHARACTERISTICS TA = 25C 5C
SYMBOL tAS tOES tDS tAH tDH tDFP tVPS tVCS tOE tPW PARAMETER Address Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time Output Enable to Output Float Delay VPP Setup Time VCC Setup Time Data Valid from OE PGM Program Pulse Width 95 MIN. 2.0 2.0 2.0 0 2.0 0 2.0 2.0 150 105 130 MAX. UNIT us us us us us ns us us ns us CONDITIONS
P/N:PM0248
7
REV.3.6, AUG. 26, 2003
MX27L256
WAVEFORMS
READ CYCLE
ADDRESS INPUTS
tACC
DATA ADDRESS
CE
tCE
OE
tDF
DATA OUT
tOE
VALID DATA
tOH
FAST PROGRAMMING ALGROITHM WAVEFORM
PROGRAM VIH
PROGRAM VERIFY
Addresses
VIL
tAS
Hi-z DATA IN STABLE DATA OUT VALID
tAH
DATA
tDS VPP1
tDH
tDFP
VPP
VCC tVPS VCC1
VCC
tVCS VCC
VIH
CE
VIL tPW VIH tOES tOE Max
OE
VIL
P/N:PM0248
8
REV.3.6, AUG. 26, 2003
MX27L256
ORDERING INFORMATION
PLASTIC PACKAGE
PART NO. ACCESS TIME(ns) OPERATING CURRENT MAX.(mA) MX27L256PC-12 MX27L256QC-12 MX27L256TC-12 MX27L256PC-15 MX27L256QC-15 MX27L256TC-15 MX27L256PC-20 MX27L256QC-20 MX27L256TC-20 MX27L256PC-25 MX27L256QC-25 MX27L256TC-25 MX27L256PI-12 MX27L256QI-12 MX27L256TI-12 MX27L256PI-15 MX27L256QI-15 MX27L256TI-15 MX27L256PI-20 MX27L256QI-20 MX27L256TI-20 MX27L256PI-25 MX27L256QI-25 MX27L256TI-25 120 120 120 150 150 150 200 200 200 250 250 250 120 120 120 150 150 150 200 200 200 250 250 250 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 STANDBY CURRENT MAX.(uA) 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 OPERATING TEMPERATURE 0 to 70C C 0 to 70C C 0 to 70C C 0 to 70C C 0 to 70C C 0 to 70C C 0 to 70C C 0 to 70C C 0 to 70C C 0 to 70C C 0 to 70C C 0 to 70C C -40 to 85 C C -40 to 85 C C -40 to 85 C C -40 to 85 C C -40 to 85 C C -40 to 85 C C -40 to 85 C C -40 to 85 C C -40 to 85 C C -40 to 85 C C -40 to 85 C C -40 to 85 C C 28 Pin DIP 32 Pin PLCC 28 Pin TSOP(I) 28 Pin DIP 32 Pin PLCC 28 Pin TSOP(I) 28 Pin DIP 32 PinPLCC 28 Pin TSOP(I) 28 Pin DIP 32 Pin PLCC 28 Pin TSOP(I) 28 Pin DIP 32 Pin PLCC 28 Pin TSOP(I) 28 Pin DIP 32 Pin PLCC 28 Pin TSOP(I) 28 Pin DIP 32 PinPLCC 28 Pin TSOP(I) 28 Pin DIP 32 Pin PLCC 28 Pin TSOP(I) PACKAGE
P/N:PM0248
9
REV.3.6, AUG. 26, 2003
MX27L256
PACKAGE INFORMATION
P/N:PM0248
10
REV.3.6, AUG. 26, 2003
MX27L256
P/N:PM0248
11
REV.3.6, AUG. 26, 2003
MX27L256
P/N:PM0248
12
REV.3.6, AUG. 26, 2003
MX27L256
REVISION HISTORY
Revision No. Description 3.0 1) Eliminate Interactive Programming Mode. 2) Add 28-TSOP(I) package offering 3) AC driving levels are changed from 2.4V/0.3V to 2.4V/0.4V. 3.1 IPP1 100uA-->10uA 3.2 Cancel Ceramic DIP Package Type 3.3 Remove 28-pin SOP Package Package Information format changed 3.4 Remove "ultraviolet erasable" wording 3.5 To modify Package Information 3.6 To modify 32-PLCC package information A1: from 0.50mm(0.020 inch)/nom. to 0.58mm(0.023 inch)/nom. from 0.66mm(0.026 inch)/nom. to 0.81mm(0.032 inch)/nom. Page Date 6/17/1997
P1,2,9,11 P1,9 P10~12 P1 P10~12 P11
7/17/1997 FEB/29/2000 SEP/19/2001 APR/24/2002 NOV/19/2002 AUG/26/2003
P/N:PM0248
13
REV.3.6, AUG. 26, 2003
MX27L256
MACRONIX INTERNATIONAL CO., LTD.
HEADQUARTERS:
TEL:+886-3-578-6688 FAX:+886-3-563-2888
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TEL:+32-2-456-8020 FAX:+32-2-456-8021
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TEL:+1-847-963-1900 FAX:+1-847-963-1909
http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.

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